I have been working on the tools and the software used to get the N8VEM SBC (normal and mini) up and operational. I am continueing to build a set of GPL'ed tools to assemble the software on the windows and linux platforms. Currently, I am using TASM, just like everyone else...
I am trying to clean up the BIOS source code to make it easier to work on and maintain. To date, I have done the following:
1) I have split the CP/M image into to two pieces - one contains CCP + BDOS and the other contains the BIOS. This makes it much easier to change the BIOS without reassembling the entire CP/M image.
2) Restored the character I/O routines to more standard CPM format. This is necessary to add the code to use the 8255 port to drive a centronics printer.
3) Replaced all the buffer moves with LDIR instructions.
4) Placed definitions and conditional assembly statements in the code to build images without harddisk and/or debug support.
5) Added code to dump the disk track, sector, page and offset of each operation on the RAM disk. This was necessary to figure out why my initial change of the RAM disk DPB and format.asm file did not work. It can be selected to not be assembled in.
6) Reprogrammed sections of code to require fewer bytes. I had experience in the 80's shoehorning code into the TNC-2 packet radio modems. Saving every byte counted! Currently, the full BIOS with hard disk and debugging support has it's last byte at 0F2AEH.
I will post the current code tree on the wiki this weekend. I can't wait for the disk controller board so I can work on the hard disk and floppy code.
15 Jan 09 - Bill Beech - NJ7P
I have uploaded the current versions of the files I am using into the files/NJ7P directory. I will be doing some more work, renaming and adding version numbers to the files. Almost all the work has been in the BIOS file so far. The batch file will build the image - I use a bin to hex program to make a hex file for my old eprom burner.
16 Jan 09 - Bill Beech - NJ7P
Comments (1)
at 8:32 am on Jan 21, 2009
Reply
Bill --
The CP/M split-up you are using is identical to the way I did it on my IMSAI when I restores it to disk boot-ability last year. All I had to do was tote around the HEX file copies of CP/M located at different locations (one at D0, D4, and D8) and I just pasted my code onto the end, knowing that the jump table was going to be in the right place. Now, my reason was because the CBIOS and hard bootloader were going to be in ROM, and I knew that was going to change, but CP/M wouldn't.
Right now, my system is a 61k system through this arrangement. When your code is stable, I'd love to work off of that tree instead of the other one.